Mastering the Interface: Overcoming Design Challenges with ADI High-Speed ADCs and AMD-Xilinx FPGAs

About the Event

We’re excited to announce two upcoming webinars that will deepen your understanding of AMD’s advanced technologies. These webinars are designed to enhance your expertise in interface types and high-speed transceivers, crucial for optimizing your FPGA designs.

Join us to explore the world of AMD through the following sessions:

Part I: Non-Transceiver Interfaces
Date: 26 July 2024
Time: 12 – 1pm (AEST)

Dive into the fundamentals of different interface types and discover the common methods used in FPGA to process ADC/DAC interface signals. This session will cover:

  • An overview of various interface types
  • Common techniques for ADC/DAC signal processing in FPGA
  • Key considerations in Hardware/PCB design, focusing on signal integrity

Part II: JESD204 Introduction and High-Speed Transceivers
Date: 2 Aug 2024
Time: 12 – 1pm (AEST)

Expand your knowledge on the JESD204 protocol and high-speed transceivers. Learn about the latest advancements and how to implement them effectively in your designs. This session will include:

  • Introduction to JESD204 (a, b, c) protocol
  • Overview of AMD transceivers (GTX, GTH, GTY, etc.)
  • Detailed transceiver structure and clocking architecture
  • Comprehensive AMD JESD204 IP overview
  • Hardware/PCB design considerations for high-speed applications

Don’t miss this opportunity to elevate your technical skills and stay ahead in the industry!

Register now to secure your spot and gain insights from industry experts. Enjoy a productive lunch break while you learn from the comfort of your own space!

We look forward to your participation!